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Firb-Reconfigurable Print E-mail
Enabling Technologies for Wireless Reconfigurable Terminals
FIRB , 2003-2005


The study, conception and realization, at least in part, of a reconfigurable platform embodying the mobile-telecommunications terminal of the future is the scope of this project. Its primary goal is the development of suitable technologies that permit the achievement of the interoperativeness and interconnectiveness properties in a compact, economic and efficient way. Our aim is to realize the critical functional blocks of the terminal that require, because of their architecture, or their configuration and processing ways, or their circuit realization, innovative approaches at the forefront of the international state-of-the-art. The main reasons for choosing to focus our attention on the wireless terminal are: the terminal is, probably, the most critical enabling element for the success of the future generations of personal communications; the peculiar makeup of the terminal in its characteristics, needs and limits, different from that of the radio base station or of other blocks in the network, requires a very specific technology and architecture. Starting form the knowledge of the different standards and ways of functioning, the main objective of the proposed research is that of implementing the architecture and circuit blocks that comprise the mobile terminal and permit multifunctionality in an efficient, economic and compact way. Our aim is to realize adequate enabling blocks, both for the transceiver at radio-frequency (front end) and for the processing of the signal in analog and digital form (back end), introducing a level of hardware reconfigurability (controlled via software) in all the component blocks, digital and analog, and where necessary in the architecture, using the same silicon technology (CMOS at 0.13 um).

The pursued objectives and the most relevant scientific aspects of the study will focus especially at five different areas: the radio-frequency front end, including the antenna interface; the analog processing at the IF/base-band including the A/D and D/A conversion; the digital processing at base band using reconfigurable processors with embedded RAM and non-volatile memory; the system analysis of future services and the various standards for identifying common aspects and for defining the operative methods associated with the interoperability; long term activities, dedicated to unconventional technology for the development of biological batteries and resonators with very high quality factors.

The main anticipated results are summarized as follows: Front end at radio frequency (a multi-standard receiver channel (LNA plus mixer), with low consumption and a minimum number of circuit blocks; a frequency synthesizer capable of producing various reference frequencies for local oscillators with minimum hardware; flexible and reconfigurable transmission channels making use of Sigma Delta techniques); Analog processing at IF/base-band (heavily-reconfigurable A/D and D/A converters, possibly also within the architecture, using digital techniques for correcting non-idealities of the analog blocks; analog filters and programmable amplifiers that utilize self-calibrating techniques and/or adaptivity); Digital processing at base band (hardware architectures for processing, communication and storage, that optimize dissipated power and programmability; programming and evaluation environment with high-level language compilation for reconfigurable machines, capable of evaluating the designed platforms and finding the best solution; memory architecture for the reconfigurable processor); Alternative and emerging technologies (biological batteries obtained from the application of bio-energetic principles for producing electric energy; high-quality resonators realized using micromachining techniques in silicon); System aspects (present and future scenarios for mobile radio-communication systems including their services; characteristics of the physical layer of the various standards with their impact on the architecture of the terminal; comparison and choice of the suitable radio interfaces for the development of the enabling technologies).

As a final result of the three years of research, we intend to make available three macro-blocks in integrated circuit form which, as a whole, carry out all the functions that are most critical from the technology, and most important from the functional points of view for a multifunctional terminal. These are: the analog receiver chain from the antenna input to the analog/digital converter output; the analog transmit chain from the digital interface at base band to the output towards the antenna (excluding the power output stages of the PA that require a high voltage technology); the reconfigurable processor for the digital base-band. The three macro-blocks will be reconfiguable at a hardware and software level (even if in different ways), so as to support the highest possible number of different standards. For their realization in IC form, we shall use standard CMOS silicon technology because of the unquestionable economic advantages and scalability implied by such a choice. We intend to use processes that correspond to both the technological node of 0.18 um (for some elementary blocks developed initially), as well as that of 0.13 um for the final macroblocks. Such an ultimate goal is extremely ambitious, and therefore implies a high risk level because of the large number of innovative circuits and architectural solutions that it entails.

Our role in this project is focused on the study of the protocols characteristic, by identifying common behaviors and architectures, leading to the maximum hardware reuse.

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